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DDR RAM Overclocking Terminology FAQ
This Terminology FAQ covers overclocking for DDR RAM for both Intel and AMD platform and adds a reference material for various guides found on hisevilness.com. RAM overclocking can be time-consuming and involves a comprehensive set of knowledge with multiple settings mostly accessible through the motherboard BIOS. As well as some abbreviation you come across when reading up on DDR RAM overclocking.
What is DDR*?
DDR stands for Double Data Rate, and the number represents the version per JEDEC design. A RAM kit advertised speed is the speed in Mhz.
What is XMP?
XMP profile is a unique profile that "overclocks" the RAM sticks above JEDEC spec(2133Mhz). This profile is always safe to use and is within the design spec of a specific DDR revision.
DIMM stands for Dual In-line Memory Module and represent the stick or sticks in a RAM kit. A DIMM slot is a socket that is DDR version-specific in pin layout on the motherboard.
A channel is a direct link from a DIMM slot to the CPU socket and therefor CPU itself. Also known as traces that represent the physical pathway in the motherboard. There are several Channel layouts, Dual-Channel where the CPU can fully utilize RAM sticks in Mhz slotted in at least 2 DIMM slots. Quad Channel usually found on HEDT can fully use minimal 4 RAM sticks in DIMM slots in Mhz. Channels can be shared, but this will sacrifice speed in Mhz and slightly increase latency.
What is an IC?
An IC is the physical silicone on a PCB of the RAM stick that presents the capacity of a RAM stick. Multiple ICs make up the full capacity of the RAM stick and come in single rank(on one side of the PCB) or dual rank(on both sides of the PCB).
IMC stands for Internal Memory Controller and is located inside the CPU in the uncore/SoC domain. And handles communication with the motherboard chip, RAM, PCIe, IO etc.
NS stands for Nano Seconds and is the ability of a RAM kit to send and receive data in nanoseconds. Latency impacts the performance of read, write and copy speeds.
Is a motherboard trace layout that will allow for better 4 DIMM support on dual-channel CPU's. While still sharing one channel for 2 DIMM they are made in such a way that the signal is transmitted equally among both DIMMs.
Is a motherboard trace layout that allows dual-channel support CPUs to share each channel of a total of 4 DIMMs. This trace layout still favours the use of 2 DIMMs since the signal strength most commonly DIMM 2 and 4 is the best.
What are save voltages for DRAM?
Voltages for DRAM according to JEDEC spec should be able to handle up to 1.5v, but this is not the case for specific ICs. While Samsung B-die can handle up to 1.5v the other Brand ICs such as Hynix or even Samsung E-die only can safely handle up to 1.45v. Higher voltages will require direct cooling such as water cooling with B-die over 1.5v and all the other revision of die over 1.45v.
|DRAM Voltage||1.20v ~ 1.45v||1.45v ~ 1.5v|
What are save voltages for DDR VTT/DRAM VTT?
DRAM VTT should not be mistaken for CPU VTT also known as VCCIO. DRAM VTT can help stabilize memory overclocks in combination with DRAM voltage. DRAM VTT should be half the DRAM voltage so as an example an XMP 1.35v DRAM voltage should be 0.675v DRAM VTT.
|DRAM VTT Voltages||1.1v ~ 1.25v||1.25v ~ 1.4v|
procODT is found on AMD Ryzen CPUs. And dictates how a data signal is terminated after it is completed. You want a lower resistance(procODT) with lower memory frequencies and higher resistance(procODT) with higher frequencies. Changing procODT should be done one value higher or lower within the range of the table below.
|Memory Frequency||3200 Mhz and Lower||3200 Mhz - 3600 Mhz||3600 Mhz - 3800Mhz|
|procODT||40 ohm - 48 ohm||48 ohm - 53 ohm||53 ohm - 68 ohm|
CLDO_VPP is the voltage supply for the interface between the CPU IMC and the DRAM Modules. The DDR4 PHY as it is known is part of the SoC domain and translates signals from the IMC to the Memory sticks. The value for CLDO_VPP is in Mv and is limited to 1 volt. Changing this value helps to counter-memory holes and requires a cold reboot if adjusted. Lowering the CLDO_VPP is more common then increasing the CLDO_VPP. Changing this value should be done with care as it is very sensitive. So in short when a VLCO_VDDP value of 850 does not stabilize a memory OC the value should be raised initially by 15 ~ 20 mv to 865 ~ 870.
CLDO_VDDG is a new voltage introduced with the Ryzen 3000 series to help combined with CLDO_VDDP to help with the IMC. However, CLDO_VDDG is specifically for the Infinity Fabrics and is regulated from the SoC power rail. Since CLDO_VDDG is tied to the SoC voltage changing either of these voltages will change the other as they act as a pair. Thus when manually changing CLDO_VDDG and SoC voltages the CLDO_VDDG voltage has to be within ~40mv. Changing CLDO_VDDG does not always help but can help in some scenarios when overclocking the FCLK(Infinity Fabric).
What are save voltages for AMD SoC?
SoC voltage is the same for all architectures with the Ryzen CPUs. And are used when overclocking the FCLK(Infinity Fabric) and MCLK(Memory Frequency). And in some cases can help to stabilize CPU overclocking.
|Ryzen SoC||1.000v ~ 1.150v||1.150 ~ 1.250|
Safe VCCIO and VCCSA voltages have been the same for about a decade and span several Intel nodes. Using extreme voltage could lead to damage of the IMC and motherboard traces.
|VCCIO Voltage||1.10v ~ 1.25v||1.25v ~ 1.35v|
|VCCSA Voltage||1.10v ~ 1.25v||1.25v ~ 1.35v|